//
// DRV8311_REG.H
// Created by Xiaoyun on 2023/3/27.
//

#ifndef FOC_DRV8311_REG_H
#define FOC_DRV8311_REG_H

#include <stdint.h>

/// \brief <b> DRV SPI Read/Write enum </b>
typedef enum{
  DRV_Write=0x0000,
  DRV_Read=0x8000
}DRV_RW_e;

/*------------------------------DRV8311 SPI Registers------------------------------*/
/// \brief <b> DRV SPI Address enum </b>
typedef enum {
  ///Device Status 1 Register
  DEV_STS1 = (0x0),
  ///Over Temperature Status Register
  OT_STS = (0x4),
  ///Supply Status Register
  SUP_STS = (0x5),
  ///Driver Status Register
  DRV_STS = (0x6),
  ///System Status Register
  SYS_STS = (0x7),
  ///PWM Sync Period Register
  PWM_SYNC_PRD = (0xC),
  ///Fault Mode Register
  FLT_MODE = (0x10),
  ///System Fault Control Register
  SYSF_CTRL = (0x12),
  ///Driver Fault Control Register
  DRVF_CTRL = (0x13),
  ///Fault Timing Control Register
  FLT_TCTRL = (0x16),
  ///Fault Clear Register
  FLT_CLR = (0x17),
  ///PWM_GEN Period Register
  PWMG_PERIOD = (0x18),
  ///PWM_GEN A Duty Register
  PWMG_A_DUTY = (0x19),
  ///PWM_GEN B Duty Register
  PWMG_B_DUTY = (0x1A),
  ///PWM_GEN C Duty Register
  PWMG_C_DUTY = (0x1B),
  ///PWM State Register
  PWM_STATE = (0x1C),
  ///PWM_GEN Control Register
  PWMG_CTRL = (0x1D),
  ///PWM Control Register 1
  PWM_CTRL1 = (0x20),
  ///Predriver control Register
  DRV_CTRL = (0x22),
  ///CSA Control Register
  CSA_CTRL = (0x23),
  ///System Control Register
  SYS_CTRL = (0x3F),
} DRV_REGS_ADDR_e;

/// \brief <b> Device Status 1 Register </b>
typedef struct {
  /// \brief <b> Device Fault Status (R) </b>
  /// \details
  /// \b 0h = No fault condition is detected \n
  /// \b 1h = Fault condition is detected \n
  uint16_t FAULT: 1;//Device Fault Status
  /// \brief <b> Overtemperature Fault Status (R) </b>
  /// \details
  /// \b 0h = No overtemperature warning / shutdown is detected \n
  /// \b 1h = Overtemperature warning / shutdown is detected \n
  uint16_t OT: 1;//Overtemperature Fault Status
  /// \brief <b> Supply Undervoltage Status (R) </b>
  /// \details
  /// \b 0h = No undervoltage voltage condition is detected on CP, AVDD or VIN_AVDD \n
  /// \b 1h = Undervoltage voltage condition is detected on CP, AVDD or VIN_AVDD \n
  uint16_t UVP: 1;//Supply Undervoltage Status
  uint16_t : 2;//
  /// \brief <b> Driver Overcurrent Protection Status (R) </b>
  /// \details
  /// \b 0h = No overcurrent condition is detected \n
  /// \b 1h = Overcurrent condition is detected \n
  uint16_t OCP: 1;//Driver Overcurrent Protection Status
  /// \brief <b> SPI Fault Status (R) </b>
  /// \details
  /// \b 0h = No SPI communication fault is detected \n
  /// \b 1h = SPI communication fault is detected \n
  uint16_t SPI_FLT: 1;//SPI Fault Status
  /// \brief <b> Supply Power On Reset Status (R) </b>
  /// \details
  /// \b 0h = No power on reset condition is detected \n
  /// \b 1h = Power-on-reset condition is detected \n
  uint16_t RESET: 1;//Supply Power On Reset Status
  /// \brief <b> OTP read fault (R) </b>
  /// \details
  /// \b 0h = No OTP read fault is detected \n
  /// \b 1h = OTP read fault detected \n
  uint16_t OTP_FLT: 1;//OTP read fault
  uint16_t : 6;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} DEV_STS1_t;

/// \brief <b> Over Temperature Status Register </b>
typedef struct {
  /// \brief <b> Overtemperature Shutdown Fault Status (R) </b>
  /// \details
  /// \b 0h = No overtemperature shutdown is detected \n
  /// \b 1h = Overtemperature shutdown is detected \n
  uint16_t OTSD: 1;//Overtemperature Shutdown Fault Status
  /// \brief <b> Overtemperature Warning Status (R) </b>
  /// \details
  /// \b 0h = No overtemperature warning is detected \n
  /// \b 1h = Overtemperature warning is detected \n
  uint16_t OTW: 1;//Overtemperature Warning Status
  /// \brief <b> AVDD LDO Overtemperature Fault Status (R) </b>
  /// \details
  /// \b 0h = No overtemperature shutdown near AVDD is detected \n
  /// \b 1h = Overtemperature shutdown near AVDD is detected \n
  uint16_t OTS_AVDD: 1;//AVDD LDO Overtemperature Fault Status
  uint16_t : 12;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} OT_STS_t;

/// \brief <b> Supply Status Register </b>
typedef struct {
  /// \brief <b> VIN_AVDD Undervoltage Fault Status (R) </b>
  /// \details
  /// \b 0h = No AVDD supply input undervoltage is detected \n
  /// \b 1h = AVDD supply input undervoltage is detected \n
  uint16_t VINAVDD_UV: 1;//VIN_AVDD Undervoltage Fault Status
  uint16_t : 1;//
  /// \brief <b> AVDD LDO Undervoltage Fault Status (R) </b>
  /// \details
  /// \b 0h = No AVDD output undervoltage is detected \n
  /// \b 1h = AVDD output undervoltage is detected \n
  uint16_t AVDD_UV: 1;//AVDD LDO Undervoltage Fault Status
  uint16_t : 1;//
  /// \brief <b> Charge Pump Undervoltage Fault Status (R) </b>
  /// \details
  /// \b 0h = No charge pump undervoltage is detected \n
  /// \b 1h = Charge pump undervoltage is detected \n
  uint16_t CP_UV: 1;//Charge Pump Undervoltage Fault Status
  /// \brief <b> CSA REF Undervoltage Fault Status (R) </b>
  /// \details
  /// \b 0h = No CSAREF undervoltage is detected \n
  /// \b 1h = CSAREF undervoltage is detected \n
  uint16_t CSAREF_UV: 1;//CSA REF Undervoltage Fault Status
  uint16_t : 9;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} SUP_STS_t;

/// \brief <b> Driver Status Register </b>
typedef struct {
  /// \brief <b> Overcurrent Status on Low-side MOSFET of OUTA (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on low-side MOSFET of OUTA \n
  /// \b 1h = Overcurrent detected on low-side MOSFET of OUTA \n
  uint16_t OCPA_LS: 1;//Overcurrent Status on Low-side MOSFET of OUTA
  /// \brief <b> Overcurrent Status on Low-side MOSFET of OUTB (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on low-side MOSFET of OUTB \n
  /// \b 1h = Overcurrent detected on low-side MOSFET of OUTB \n
  uint16_t OCPB_LS: 1;//Overcurrent Status on Low-side MOSFET of OUTB
  /// \brief <b> Overcurrent Status on Low-side MOSFET of OUTC (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on low-side MOSFET of OUTC \n
  /// \b 1h = Overcurrent detected on low-side MOSFET of OUTC \n
  uint16_t OCPC_LS: 1;//Overcurrent Status on Low-side MOSFET of OUTC
  uint16_t : 1;//
  /// \brief <b> Overcurrent Status on High-side MOSFET of OUTA (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on high-side MOSFET of OUTA \n
  /// \b 1h = Overcurrent detected on high-side MOSFET of OUTA \n
  uint16_t OCPA_HS: 1;//Overcurrent Status on High-side MOSFET of OUTA
  /// \brief <b> Overcurrent Status on High-side MOSFET of OUTB (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on high-side MOSFET of OUTB \n
  /// \b 1h = Overcurrent detected on high-side MOSFET of OUTB \n
  uint16_t OCPB_HS: 1;//Overcurrent Status on High-side MOSFET of OUTB
  /// \brief <b> Overcurrent Status on High-side MOSFET of OUTC (R) </b>
  /// \details
  /// \b 0h = No overcurrent detected on high-side MOSFET of OUTC \n
  /// \b 1h = Overcurrent detected on high-side MOSFET of OUTC \n
  uint16_t OCPC_HS: 1;//Overcurrent Status on High-side MOSFET of OUTC
  uint16_t : 8;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} DRV_STS_t;

/// \brief <b> System Status Register </b>
typedef struct {
  /// \brief <b> SPI Frame Error (R) </b>
  /// \details
  /// \b 0h = No SPI Frame Error is detected \n
  /// \b 1h = SPI Frame Error is detected \n
  uint16_t FRM_ERR: 1;//SPI Frame Error
  /// \brief <b> SPI Bus Contention Error (R) </b>
  /// \details
  /// \b 0h = No SPI Bus Contention Error is detected \n
  /// \b 1h = SPI Bus Contention Error is detected \n
  uint16_t BUS_CNT: 1;//SPI Bus Contention Error
  /// \brief <b> SPI Parity Error (R) </b>
  /// \details
  /// \b 0h = No SPI Parity Error is detected \n
  /// \b 1h = SPI Parity Error is detected \n
  uint16_t SPI_PARITY: 1;//SPI Parity Error
  uint16_t : 1;//
  /// \brief <b> OTP Read Error (OTPLD_ERR R) </b>
  /// \details
  /// \b 0h = No OTP read error is detected \n
  /// \b 1h = OTP read error is detected \n
  uint16_t OTPLD_ERR: 1;//OTP Read Error
  uint16_t : 10;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} SYS_STS_t;

/// \brief <b> PWM Sync Period Register </b>
typedef struct {
  /// \brief <b> 12-bit output indicating period of PWM_SYNC signal (R) </b>
  uint16_t PWM_SYNC_PRD: 12;//12-bit output indicating period of PWM_SYNC signal
  uint16_t : 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWM_SYNC_PRD_t;

/// \brief <b> Fault Mode Register </b>
typedef struct {
  /// \brief <b> Overtemperature Fault mode (R/W) </b>
  /// \details
  /// \b 0h = Report on nFault, predriver HiZ, auto recovery with Slow Retry time (in ms) \n
  /// \b 1h = Report on nFault, predriver HiZ, auto recovery with Fast Retry time (in ms) \n
  /// \b 2h = Reserved \n
  /// \b 3h = Reserved \n
  uint16_t OTSD_MODE: 2;//Overtemperature Fault mode
  /// \brief <b> Undervoltage Protection Fault mode (R/W) </b>
  /// \details
  /// \b 0h = Report on nFault, predriver HiZ, auto recovery with Slow Retry  \n
  /// \b time (in ms) \n
  /// \b 1h = Report on nFault, predriver HiZ, auto recovery with Fast Retry  \n
  /// \b time (in ms) \n
  /// \b 2h = Reserved \n
  /// \b 3h = Reserved \n
  uint16_t UVP_MODE: 2;//Undervoltage Protection Fault mode
  /// \brief <b> Overcurrent Protection Fault mode (R/W) </b>
  /// \details
  /// \b 0h = Report on nFault, predriver HiZ, auto recovery with Slow Retry time (in ms) \n
  /// \b 1h = Report on nFault, predriver HiZ, auto recovery with Fast Retry time (in ms) \n
  /// \b 2h = Report on nFault, predriver HiZ, Latched Fault \n
  /// \b 3h = Report on nFault, No action on predriver \n
  /// \b 4h = Reserved \n
  /// \b 5h = Reserved \n
  /// \b 6h = Reserved \n
  /// \b 7h = Disabled \n
  uint16_t OCP_MODE: 3;//Overcurrent Protection Fault mode
  /// \brief <b> SPI Fault mode (R/W) </b>
  /// \details
  /// \b 0h = SPI Fault is enabled \n
  /// \b 1h = SPI Fault is disabled \n
  uint16_t SPIFLT_MODE: 1;//SPI Fault mode
  /// \brief <b> System Fault Mode. (R/W) </b>
  /// \details
  /// \b 0h = OTP read fault is enabled \n
  /// \b 1h = OTP read fault is disabled \n
  uint16_t OTPFLT_MODE: 1;//System Fault Mode.
  uint16_t : 6;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} FLT_MODE_t;

/// \brief <b> System Fault Control Register </b>
typedef struct {
  uint16_t : 5;//
  /// \brief <b> CSAREF Undervoltage Fault Enable (R/W) </b>
  /// \details
  /// \b 0h = CSAREF undervoltage lockout is disabled \n
  /// \b 1h = CSAREF undervoltage lockout is enabled \n
  uint16_t CSAREFUV_EN: 1;//CSAREF Undervoltage Fault Enable
  uint16_t : 3;//
  /// \brief <b> Overtemperature Warning Fault Enable (R/W) </b>
  /// \details
  /// \b 0h = Over temperature warning reporting on nFAULT is disabled \n
  /// \b 1h = Over temperature warning reporting on nFAULT is enabled \n
  uint16_t OTW_EN: 1;//Overtemperature Warning Fault Enable
  /// \brief <b> AVDD Overtemperature Fault Enable (R/W) </b>
  /// \details
  /// \b 0h = Overtemperature protection near AVDD is disabled \n
  /// \b 1h = Overtemperature protection near AVDD is enabled \n
  uint16_t OTAVDD_EN: 1;//AVDD Overtemperature Fault Enable
  uint16_t : 4;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} SYSF_CTRL_t;

/// \brief <b> Driver Fault Control Register </b>
typedef struct {
  /// \brief <b> OCP Level Settings (R/W) </b>
  /// \details
  /// \b 0h = OCP level is 9 A (TYP) \n
  /// \b 1h = OCP level is 5 A (TYP) \n
  uint16_t OCP_LVL: 1;//OCP Level Settings
  uint16_t : 1;//
  /// \brief <b> OCP Blanking time (R/W) </b>
  /// \details
  /// \b 0h = OCP blanking time is 0.2 µs \n
  /// \b 1h = OCP blanking time is 0.5 µs \n
  /// \b 2h = OCP blanking time is 0.8 µs \n
  /// \b 3h = OCP blanking time is 1 µs \n
  uint16_t OCP_TBLANK: 2;//OCP Blanking time
  /// \brief <b> OCP Deglitch time (R/W) </b>
  /// \details
  /// \b 0h = OCP deglitch time is 0.2 µs \n
  /// \b 1h = OCP deglitch time is 0.5 µs \n
  /// \b 2h = OCP deglitch time is 0.8 µs \n
  /// \b 3h = OCP deglitch time is 1 µs \n
  uint16_t OCP_DEG: 2;//OCP Deglitch time
  uint16_t : 9;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} DRVF_CTRL_t;

/// \brief <b> Fault Timing Control Register </b>
typedef struct {
  /// \brief <b> Fast Recovery Retry Time from Fault Condition (R/W) </b>
  /// \details
  /// \b 0h = 0.5ms \n
  /// \b 1h = 1ms \n
  /// \b 2h = 2ms \n
  /// \b 3h = 5ms \n
  uint16_t FAST_TRETRY: 2;//Fast Recovery Retry Time from Fault Condition
  /// \brief <b> Slow Recovery Retry Time from Fault Condition (R/W) </b>
  /// \details
  /// \b 0h = 0.5s \n
  /// \b 1h = 1s \n
  /// \b 2h = 2s \n
  /// \b 3h = 5s \n
  uint16_t SLOW_TRETRY: 2;//Slow Recovery Retry Time from Fault Condition
  uint16_t : 11;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} FLT_TCTRL_t;

/// \brief <b> Fault Clear Register </b>
typedef struct {
  /// \brief <b> Clear Fault (W) </b>
  /// \details
  /// \b 0h = No clear fault command is issued \n
  /// \b 1h = To clear the latched fault bits. This bit automatically resets after  \n
  /// \b being written. \n
  uint16_t FLT_CLR: 1;//Clear Fault
  uint16_t : 14;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} FLT_CLR_t;

/// \brief <b> PWM_GEN Period Register </b>
typedef struct {
  /// \brief <b> 12-bit Period for output PWM signals in PWM Generation Mode (R/W) </b>
  uint16_t PWM_PRD_OUT: 12;//12-bit Period for output PWM signals in PWM Generation Mode
  uint16_t : 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWMG_PERIOD_t;

/// \brief <b> PWM_GEN A Duty Register </b>
typedef struct {
  /// \brief <b> 12-bit Duty Cycle for Phase A output in PWM Generation Mode (R/W) </b>
  uint16_t PWM_DUTY_OUTA: 12;//12-bit Duty Cycle for Phase A output in PWM Generation Mode
  uint16_t : 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWMG_A_DUTY_t;

/// \brief <b> PWM_GEN B Duty Register </b>
typedef struct {
  /// \brief <b> 12-bit Duty Cycle for Phase B output in PWM Generation Mode (R/W) </b>
  uint16_t PWM_DUTY_OUTB: 12;//12-bit Duty Cycle for Phase B output in PWM Generation Mode
  uint16_t : 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWMG_B_DUTY_t;

/// \brief <b> PWM_GEN C Duty Register </b>
typedef struct {
  /// \brief <b> 12-bit Duty Cycle for Phase C output in PWM Generation Mode (R/W) </b>
  uint16_t PWM_DUTY_OUTC: 12;//12-bit Duty Cycle for Phase C output in PWM Generation Mode
  uint16_t : 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWMG_C_DUTY_t;

/// \brief <b> PWM State Register </b>
typedef struct {
  /// \brief <b> Phase A Driver Output control (R/W) </b>
  /// \details
  /// \b 0h = High Side is OFF, Low Side is OFF \n
  /// \b 1h = High Side is OFF, Low Side is forced ON \n
  /// \b 2h = High Side is forced ON, Low Side is OFF \n
  /// \b 3h = Reserved \n
  /// \b 4h = Reserved \n
  /// \b 5h = High Side is OFF, Low Side PWM \n
  /// \b 6h = High Side PWM, Low Side is OFF \n
  /// \b 7h = High Side PWM, Low Side !PWM \n
  uint16_t PWMA_STATE: 3;//Phase A Driver Output control
  uint16_t : 1;//
  /// \brief <b> Phase B Driver Output control (R/W) </b>
  /// \details
  /// \b 0h = High Side is OFF, Low Side is OFF \n
  /// \b 1h = High Side is OFF, Low Side is forced ON \n
  /// \b 2h = High Side is forced ON, Low Side is OFF \n
  /// \b 3h = Reserved \n
  /// \b 4h = Reserved \n
  /// \b 5h = High Side is OFF, Low Side PWM \n
  /// \b 6h = High Side PWM, Low Side is OFF \n
  /// \b 7h = High Side PWM, Low Side !PWM \n
  uint16_t PWMB_STATE: 3;//Phase B Driver Output control
  uint16_t : 1;//
  /// \brief <b> Phase C Driver Output control (R/W) </b>
  /// \details
  /// \b 0h = High Side is OFF, Low Side is OFF \n
  /// \b 1h = High Side is OFF, Low Side is forced ON \n
  /// \b 2h = High Side is forced ON, Low Side is OFF \n
  /// \b 3h = Reserved \n
  /// \b 4h = Reserved \n
  /// \b 5h = High Side is OFF, Low Side PWM \n
  /// \b 6h = High Side PWM, Low Side is OFF \n
  /// \b 7h = High Side PWM, Low Side !PWM \n
  uint16_t PWMC_STATE: 3;//Phase C Driver Output control
  uint16_t : 4;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWM_STATE_t;

/// \brief <b> PWM_GEN Control Register </b>
typedef struct {
  /// \brief <b> Number of SPI Clock Cycle require for synchronizing the Oscillator (R/W) </b>
  /// \details
  /// \b 0h = 512 Clock Cycles (1%) \n
  /// \b 1h = 256 Clock Cycles (1%) \n
  /// \b 2h = 128 Clock Cycles (1%) \n
  /// \b 3h = 64 Clock Cycles (2%) \n
  uint16_t SPISYNC_ACRCY: 2;//Number of SPI Clock Cycle require for synchronizing the Oscillator
  /// \brief <b> SPI Clock Frequency for synchronizing the Oscillator (R/W) </b>
  /// \details
  /// \b 0h = 1 MHz \n
  /// \b 1h = 1.25 MHz \n
  /// \b 2h = 2 MHz \n
  /// \b 3h = 2.5 MHz \n
  /// \b 4h = 4 MHz \n
  /// \b 5h = 5 MHz \n
  /// \b 6h = 8 MHz \n
  /// \b 7h = 10 MHz \n
  uint16_t SPICLK_FREQ_SYNC: 3;//SPI Clock Frequency for synchronizing the Oscillator
  /// \brief <b> Oscillator synchronization and PWM_SYNC control (R/W) </b>
  /// \details
  /// \b 0h = Oscillator synchronization is disable \n
  /// \b 1h = PWM_SYNC_PRD indicates period of PWM_SYNC signal and can be used to calibrate PWM period \n
  /// \b 2h = PWM_SYNC used to set PWM period \n
  /// \b 3h = Oscillator synchronization is disable \n
  /// \b 4h = Oscillator synchronization is disable \n
  /// \b 5h = PWM_SYNC used for oscillator synchronization (only 20 kHz frequency supported) \n
  /// \b 6h = PWM_SYNC used for oscillator synchronization and setting PWM period (only 20 kHz frequency supported) \n
  /// \b 7h = SPI Clock pin SCLK used for oscillator synchronization (Configure SPICLK_FREQ_SYNC) \n
  uint16_t PWM_OSC_SYNC: 3;//Oscillator synchronization and PWM_SYNC control
  /// \brief <b> PWM Gen counter mode (R/W) </b>
  /// \details
  /// \b 0h = Up and Down \n
  /// \b 1h = Up \n
  /// \b 2h = Down \n
  /// \b 3h = No action \n
  uint16_t PWMCNTR_MODE: 2;//PWM Gen counter mode
  /// \brief <b> Enable 3X Internal mode PWM Generation (R/W) </b>
  /// \details
  /// \b 0h = PWM_GEN disabled \n
  /// \b 1h = PWM_GEN enabled \n
  uint16_t PWM_EN: 1;//Enable 3X Internal mode PWM Generation
  uint16_t : 4;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWMG_CTRL_t;

/// \brief <b> PWM Control Register 1 </b>
typedef struct {
  /// \brief <b> PWM mode selection (R/W) </b> \n (The reset setting in DRV8311S is 00b and in DRV8311P is 11b)
  /// \details
  /// \b 0h = 6x mode \n
  /// \b 1h = 6x mode \n
  /// \b 2h = 3x mode \n
  /// \b 3h = PWM Generation mode \n
  uint16_t PWM_MODE: 2;//PWM mode selection (The reset setting in DRV8311S is 00b and in DRV8311P is 11b)
  /// \brief <b> Disable Spread Spectrum Modulation for internal Oscillator (R/W) </b>
  /// \details
  /// \b 0h = Spread spectrum modulation is enabled \n
  /// \b 1h = Spread spectrum modulation is disabled \n
  uint16_t SSC_DIS: 1;//Disable Spread Spectrum Modulation for internal Oscillator
  uint16_t : 12;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} PWM_CTRL1_t;

/// \brief <b> Predriver control Register </b>
typedef struct {
  /// \brief <b> Slew rate settings (R/W) </b>
  /// \details
  /// \b 0h = Slew rate is 35 V/µs \n
  /// \b 1h = Slew rate is 75 V/µs \n
  /// \b 2h = Slew rate is 180 V/µs \n
  /// \b 3h = Slew rate is 230 V/µs \n
  uint16_t SLEW_RATE: 2;//Slew rate settings
  uint16_t : 2;//
  /// \brief <b> Deadtime insertion control (R/W) </b>
  /// \details
  /// \b 0h = No deadtime (Handshake Only) \n
  /// \b 1h = 200ns \n
  /// \b 2h = 400ns \n
  /// \b 3h = 600ns \n
  /// \b 4h = 800ns \n
  /// \b 5h = 1us \n
  /// \b 6h = 1.2us \n
  /// \b 7h = 1.4us \n
  uint16_t TDEAD_CTRL: 3;//Deadtime insertion control
  /// \brief <b> Driver Delay Compensation enable (R/W) </b>
  /// \details
  /// \b 0h = Driver Delay Compensation is disabled \n
  /// \b 1h = Driver Delay Compensation is enabled \n
  uint16_t DLYCMP_EN: 1;//Driver Delay Compensation enable
  uint16_t : 7;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} DRV_CTRL_t;

/// \brief <b> CSA Control Register </b>
typedef struct {
  /// \brief <b> Current Sense Amplifier Gain settings (R/W) </b>
  /// \details
  /// \b 0h = CSA gain is 0.25 V/A \n
  /// \b 1h = CSA gain is 0.5 V/A \n
  /// \b 2h = CSA gain is 1 V/A \n
  /// \b 3h = CSA gain is 2 V/A \n
  uint16_t CSA_GAIN: 2;//Current Sense Amplifier Gain settings
  uint16_t : 1;//
  /// \brief <b> Current Sense Amplifier Enable (R/W) </b>
  /// \details
  /// \b 0h = Current Sense Amplifier is disabled \n
  /// \b 1h = Current Sense Amplifier is enabled \n
  uint16_t CSA_EN: 1;//Current Sense Amplifier Enable
  uint16_t : 11;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} CSA_CTRL_t;

/// \brief <b> System Control Register </b>
typedef struct {
  uint16_t : 6;//
  /// \brief <b> Parity Enable for both SPI and tSPI (R/W) </b>
  /// \details
  /// \b 0h = Parity Disabled \n
  /// \b 1h = Parity Enabled \n
  uint16_t SPI_PEN: 1;//Parity Enable for both SPI and tSPI
  /// \brief <b> Register Lock Bit (R/W) </b>
  /// \details
  /// \b 0h = Registers Unlocked \n
  /// \b 1h = Registers Locked \n
  uint16_t REG_LOCK: 1;//0x5 Write Key Specific to this register
  uint16_t : 4;//
  /// \brief <b> 0x5 Write Key Specific to this register (W) </b>
  uint16_t WRITE_KEY: 3;//
  uint16_t Parity_bit: 1;//Parity Bit if SPI_PEN is set to '1' otherwise reserved(R)
} SYS_CTRL_t;


#endif //FOC_DRV8311_REG_H
